The scope of the project should include one or more of the topics below:

• Advanced baseband capabilities as needed in virtualised platforms from the device or network side, taking open approaches and RISC-V technologies as targets and supporting SoC’s implementations as well as AI Edge modules, integration of multiple technologies for JCAS, Flexible hardware platforms supporting virtualisation and programmability in a fully distributed edge environment, including hardware accelerators. The project should clearly identify how potential computing infrastructure will be used to cater for the needs of the communication infrastructure.
• Integration of the THz communications technology into a complete THz communication chain and demonstrator, in view of validating the technology in an end-to-end radio system context, focusing on the two main THz communications applications: Integrated Access Backhaul (IAB) with high capacity provided to a myriad of small/nano cells; direct short range high-capacity access as needed in specific industrial environments.
• The system validation in this platform context which may address an E2E x-hauling demonstrator prototype with extended transmission reach at Sub-THz frequencies (>140GHz). The idea is to push the disruptive THz components developed previously to higher TRL levels and demonstrate their capabilities in D-band (140-164GHz) or above with extended performances such as power amplifiers reaching high power saturation while keeping low power consumption and low noise amplifiers (LNA) with low noise figure and high gain. In the context of industrialisation, the purpose will be also to showcase implementation of interconnected technologies in RFICs compatible with low RF loss at sub-THz frequencies operation.
• The potential inclusion of microelectronics solutions in the transport domain or unified solutions with NTNs and support of the IoT-connectivity-service provision value chain as appropriate.
• The establishment of a bridge between the SNS JU and the Chips JU, offering on the one hand new requirements to the microelectronics domain while on the other hand providing validation results of the tested solutions to Chips JU so that these can be considered in the subsequent phases of the Chips JU. The scope of the project targets an active cooperation link between the two communities and serve as a catalyst for further related activities for the EU private and public sectors. The scope also covers prominent downstream 6G standardisation activities by the microelectronics industries and stakeholders.

Evaluation of core 6G technologies and architectures in the context of specific 6G use cases may be considered but is not mandatory. Support of AI implementations through the considered microelectronics focus of the project shall include availability of large-scale data sets and training sequences as part of open repositories available to the EU community at large.

The demonstration capabilities of the target platform(s) are to be assessed against a set of emerging KPIs and KVIs as typically defined by the 6G international community and on-going initiatives. Proposals should be flexible enough to accommodate new relevant KPIs as they become available from the wider 6G community and from potential use cases.

To provide the required openness to host vertical use case pilots it is desirable that the project platform(s) support open framework principles (e.g., both legal and technical like open APIs) enabling future vertical projects to access and use them. It is also strongly desirable that these facilities are built in a way that allows the evaluation of competing technologies where appropriate.

In view of ensuring maximum take up of the validated technologies, proposals should include a significant representation of key European industrial supply side players, in partnership with relevant academic, RTO, user actors, with strong demonstrated impact at standardisation level.