The scope of this topic focuses on the following areas:

• A FEM design that covers the FR3 frequency range, also taking into account the upper part of the 6Ghz band, potentially usable for Mobile Services (6.425- 7.125 GHz). This does not preclude addressing higher sub-bands of the FR3 spectrum to cater for regional regulatory variations and to include ISAC capabilities. The design includes the characterisation and specification of the FEM constituent elements, such as the power amplifiers, LNB, filters, multiplexers/multipliers, ADC and DAC stages, beamformers, and antenna arrays. It also covers the specification of the digital functionalities to be implemented in the FEM, such as DPD, beam steering, channel selection and adaptation as typical examples. This detailed specification part is expected to be subject to tight links with the project selected under the Chips JU Work Programme 2026, as the two projects should complement each other.
• The design of a complete FEM, including a Digital Front End, a Radio Front End, antenna elements with the needed conversion stages and capable of handling at least 200 MHz channels and compatible with 400 MHz channels. It enables high-throughput/capacity fronthaul with performance capabilities close to those defined by the ITU 2030 Framework (ITU-R Recommendation M.2160-0) for peak data rates, user data rates and spectrum efficiency whilst enabling 50% energy savings of the transmission for a comparable bit rate conveyed by a 5G system.
• The FEM design should cater for innovative approaches for uplink spectrum management with more balanced downlink/uplink capacity compared to 5G, and addressing uplink requirements originating from new classes of AI/ML-generated traffic.
• The FEM design should take into account the operational requirements of use cases that would most appropriately benefit from FR3 operations in the wireless domain, for both cellular use cases and FWA use cases, and the comparison of their performance against implementations used at FR1 or FR2 spectrum ranges, respectively. It includes capabilities to realise Sub Band Full Duplex Operations at least at the level specified under 3GPP release 19 for 5G advanced and also in support of ISAC operations. This requires addressing the needed self-interference cancellation functions over a wide spectrum block. It also covers Integrated Communication and Sensing application and includes secure ICAS-specific functions at the digital or RF level. It covers the implementation aspects of a combined Rx/Tx chain for JCAS with high node integration and maximisation of functional blocks between the communication and sensing Tx/Rx chains.
• For the considered FR3 sub-bands that the FEM is designed to cover, spectrum sharing capabilities with incumbent services is addressed by design in view of maximising sharing opportunities and is reflected in the FEM design. Satellite and military applications are particularly relevant in that context. It also covers adaptation and tuning capabilities such that the FEM design and implementation remain compatible with specific regional implementations of the relevant FR3 range. Sharing validation through demonstration is in scope.
• Analysis and trade off of the best technologies and their mix, taking into account the characteristics of various microelectronics technologies namely, i) computing (e.g. CMOS, FDSOI); ii) RF (e.g. RF CMOS, RF SOI, FD-SOI, GaN-on-SiC, GaN-on-Si, InP, InP on Si, SiGeBiCMOS, SiGebipolar); iii) power generation technologies (e.g. GaN-on-SiC, GaN-on-Si, BCD, LDMOS). Depending on the antenna fan-out and needed output power level, a combination of CMOS technology and GaN/Si may be envisaged, though other technologies might also be contemplated with cost-performance trade-off driving the eventual FEM SoC. This analysis should also critically take into account i) the capabilities of European industry to industrialise the resulting FEM module; ii) the opportunity to use the Chips JU pilot lines for downstream integration and pre-industrialisation; iii) the packaging constraints and feasibility when assembling multiple heterogeneous technologies. The selected constituent technologies of the FEM should demonstrate smart integration feasibility of a multiplicity of heterogeneous technologies and modules with low loss characteristics at RF, digital, power levels and related packaging, leveraging Chip JU developments, as appropriate. Particular attention is needed for ultra-high transmit power/system core technologies needed to develop high power/ high gain/low noise transceivers and their coupling with CMOS/digital technology, and enabling SoC implementation. Optical technologies may be in scope if compatible with an efficient FEM design and implementation, and further transfer towards Chip JU Pilot lines. This work is expected to deliver a comparative assessment of various technologies as possible contenders to implement and industrialise a FEM. The final architecture/technology selection, including the selection of the relevant pilot lines is though expected to be delivered through the detailed design and implementation work addressed by the Chips JU call.
• AI/ML application is in scope, in view of contributing to network management efficiency and radio system performances in line with the Apply AI strategy. As AI/ML technology allows generating new classes of traffic and hence new spectrum requirements towards spectrum management (see uplink considerations above), the FEM design has to reflect the requirements imposed by these new traffic types. Also, AI/ML is a potential enabler of important FEM functionalities management and control, such as: i) optimisation of channel behaviour prediction and analysis of Channel State Information (CSI) together with its implementation capability in the context of an industrialised FEM; ii) optimisation of spectrum usage prediction and interference mitigation; iii) optimisation of FEM functional performances and non-functional properties like energy consumption. This list is not exhaustive, and relevant functionalities will be considered as a function of a cost/performance/complexity trade off. If appropriate, the full integration of AI/ML functions into the FEM or its implementation outside of the FEM through the provision of a dedicated open interface (similar to the RIC interface in the ORAN model) is left to the industry as a function of their strategic roadmap, however, a justification must be provided. Therefore, the FEM design may also consider interaction with external AI-driven functions at network management level, in view of supporting emerging AI-based applications, without prescribing specific implementations.
• The activity will consider linkages with the FEM topic under the Chips JU WP26. The linkages will be explained in the proposal workplan, which will address the desired interfaces between this action at the system level and the expected Chips JU actions that will focus on specific design and technologies of the elementary FEM components and their larger scale integration. A particular attention will be paid to: i) an identification of a downstream high level of node integration for further transfer to Pilot Lines. A plan for development and for such transfer, as a function of the eventual technological choice and of the Pilot Line readiness, to the relevant Pilot Line(s) is in scope and will be coordinated with the Chips JU FEM actions; ii) the needed evolution of the design tools to support the downstream FEM development, like EDA, PDK. The design tools offered by the design platform of the Chips JU should preferably be considered, but this is not mandatory.