The Design Platform should act as a hub of services to support European companies engaged in chip design.

The Design Platform is implemented via 2 main classes of entities:

• The Platform Coordination Team (PCT) which coordinates the Design Platform, establishes framework agreements with EDA/IP suppliers and provides access to a central cloud service encompassing a marketplace with open source or proprietary IPs/EDA tools/PDKs and trainings amongst other resources. The PCT also provides DETs with Infrastructure as Code to ease the deployment of cloud instances
• The Design Enablement Teams (DETs) each of which is in charge managing a distributed cloud instance and providing dedicated application engineering support to users from setting up their design environment and design flows up to tape-out. A DET can be a single entity, or a consortium of entities selected among providers of chips design support services, such as design houses, RTOs or other entities currently providing design enablement services on a commercial basis.

The scope of this call is to select a number of Design Enablement Team.

The core functions of DETs include, but are not limited to:

• Deployment of Electronic Design Automation (EDA) tools on the cloud: DETs will manage secured cloud instances facilitating access to essential design tools and simulation environments. To this end, DETs may contract with a cloud provider of their choice to setup this infrastructure.It is expected that prospective DETs demonstrate experience in commercial designs using tools from established EDA vendors.
• Design flow support and customisation: DETs will assist users in setting up and customising design environments and flows, ensuring smooth progression from initial setup to tape-out.
• Application engineering: DETs will offer dedicated application engineering support, addressing specific user needs and challenges throughout the development process.
• Access to Process Design Kits (PDKs): DETs will provide users with access to the necessary PDKs and ADKs for their design projects. Each DET must have legal authorisation to use and/or provide its users access to PDKs/ADKs of at least one semiconductor foundry.
• Design expertise: DETs will provide users with access to the necessary design expertise for their design projects, directly via the DET’s resources and/or through partnerships with third parties.
• Prototyping and fabrication services: DETs will facilitate prototyping and fabrication services including packaging and testing through partnerships with leading foundries or aggregators, the Chips for Europe Initiative pilot lines or other relevant pilot lines. Each DET must have already established direct or indirect relationships with at least one semiconductor foundry, enabling efficient communication and ensuring technology advice and support to its users.

It is expected that each DET should manage a cloud instance offering dedicated application engineering support to users, from setting up their design environment and design flows to tape-out. The DET will maintain a cloud-based connection to the PCT’s central cloud to manage user access, extend its capacity with additional resources (open-source IPs, EDA Tools, PDK…) and deliver periodic monitoring data to increase the quality of service of the Design Platform.